我正在尝试使用Verilog将BCD计数器连接到7段解码器。
后,我合成它,发生错误是这样的:
Multi-source in Unit <BCDcountmod> on signal <BCD0<3>>; this signal is connected to multiple drivers.>
**还有更多.....
***任何解决方案*(这里是我的代码如下)Verilog多个驱动程序
module BCDcountmod(
input Clock, Clear, up, down,
output [3:0] BCD1_1, BCD0_0);
reg [3:0] BCD1, BCD0;
//reg [3:0] BCD1_1, BCD0_0;
always @(posedge Clock) begin
if (Clear) begin
BCD1 <= 0;
BCD0 <= 0;
end
end
always @(posedge up) begin
if (BCD0 == 4'b1001) begin
BCD0 <= 0;
if (BCD1 == 4'b1001)
BCD1 <= 0;
else
BCD1 <= BCD1 + 1;
end
else
BCD0 <= BCD0 + 1;
end
always @(posedge down) begin
if (BCD0 == 4'b0000) begin
BCD0 <= 4'b1001;
if (BCD1 == 4'b1001)
BCD1 <= 4'b1001;
else
BCD1 <= BCD1 - 1;
end
else
BCD0 <= BCD0 - 1;
end
assign BCD1_1 = BCD1;
assign BCD0_0 = BCD0;
endmodule
看起来像以下副本:http://electronics.stackexchange.com/questions/93932/connected-to-multiple-drivers-problem-verilog – Greg