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我试图让集&负荷d-触发器代码(同步),但它一直给我count <= '0' & d; it has 2 elements but must have 9 elements
error.Thanks提前VHDL错误10344不知道该怎么办
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity syn is
port (
clk : in std_logic;
rst_n : in std_logic;
d : in std_logic;
ld : in std_logic;
q : out std_logic_vector(7 downto 0);
co : out std_logic);
end syn;
architecture rtl of syn is
signal count : std_logic_vector(8 downto 0);
begin
co <= count(8);
q <= count(7 downto 0);
process (clk)
begin
if (clk'event and clk = '1') then
if (rst_n = '0') then
count <= (others => '0'); -- sync reset
elsif (ld = '1') then
count <= '0' & d; -- sync load
else
count <= count + 1; -- sync increment
end if;
end if;
end process;
end rtl;
错误消息告诉你什么是错的 - 在这种情况下非常准确。 –
聚集,例如'count <= (0 => d,others =>'0');'其中count(0)被赋值为d,其他(8 downto 1)赋值为'0'。否则你的意图不明确。你是否打算只加载两个索引位置? – user1155120