我想分两个整数如下:如何强制转换整数无符号的VHDL
variable m0Low : integer := 0;
variable m1Low : integer := 0;
m1Low := divide(m1Low,m0Low);
使用功能:
function divide (a : UNSIGNED; b : UNSIGNED) return UNSIGNED is
variable a1 : unsigned(a'length-1 downto 0):=a;
variable b1 : unsigned(b'length-1 downto 0):=b;
variable p1 : unsigned(b'length downto 0):= (others => '0');
variable i : integer:=0;
begin
for i in 0 to b'length-1 loop
p1(b'length-1 downto 1) := p1(b'length-2 downto 0);
p1(0) := a1(a'length-1);
a1(a'length-1 downto 1) := a1(a'length-2 downto 0);
p1 := p1-b1;
if(p1(b'length-1) ='1') then
a1(0) :='0';
p1 := p1+b1;
else
a1(0) :='1';
end if;
end loop;
return a1;
end divide;
不过,我得到以下错误: Divide can not have such operands in this context.
我想将变量转换为无符号的m1Low := divide(unsigned(m1Low),unsigned(m0Low));
但我得到以下错误: The expression can not be converted to type unsigned.
任何想法我可以做什么? 感谢 哈里斯
任何原因,你不能只使用除法运算符? 'm1Low:= M1Low/m0Low'? –
它给出/ sign的右侧部分必须是2的幂的错误!不知道为什么。 –
啊,那是因为你的合成器不够聪明,无法为非静态的,非2的功率建立一个分频器。评估更好(即更昂贵;()综合工具可能会有所帮助;或者使用CoreGen构建分频器内核。 –